Perf stat -e cycles -e instructions -e L1-icache-load-misses -e branches -e branch-misses \ Here is an output of perf stat/report while running perf benchmark with OpenSBI,
The U-Boot patch is just an example that encodes few of the events defined
Just use legacy pmu driver if old OpenSBI is detected. Versions with latest OpenSBI and/or Kernel. That means, you can not use perf anymore on older Qemu Qemu & OpenSBI patches are required to test it on Qemu and a dt patch This series has been tested in Qemu (RV64 & RV32) and HiFive Unmatched. Implementation, I will be happy to drop PATCH 4. If everybody agrees that we don't need legacy perf implementation for older However, I don't want to break perf for any existing hardware platforms. That's why, I am not very keen to carry the support into the new driver. In general, this is very limited and not very useful. Monitoring of always running cycle/instruction counters. The legacy driver tries to reimplement the existing minimal perf under a newĬonfig to maintain backward compatibility. Currently, SBI PMU driver & legacy PMU driver are implemented This is easily extensible and any future RISC-V PMU implementationĬan leverage this. While individual PMUs need to only implement necessary features specific to The new perf implementation has adopted a modularĪpproach where most of the generic event handling is done in the core library
This series introduces a platform perf driver instead of a existing arch Take advantage of all both event counting and sampling using perf tool. With both of these extension enabled, a platform can The sscofpmf extension if it supports mcountinhibit and mcounteren. An hardware platform can leverage SBI PMU extension without While the sscofpmf extension allows the counter overflow interrupt and privilege The kernel to program the counters for different events and start/stop counters SBI PMU extension and Sscofpmf extension. This series adds improved perf support for RISC-V based system using Palmer Dabbelt, Paul Walmsley, Rob Herring, Vincent Chen Linux-doc, linux-perf-users, linux-riscv, Nick Kossifidis, Greentime Hu, Guo Ren, Heinrich Schuchardt, Jonathan Corbet, ` (10 more replies) 0 siblings, 11 replies 14+ messages in threadĬc: Atish Patra, Anup Patel, David Abdurachmanov, devicetree, 19:53 ` RISC-V: Remove the current perf implementation Atish Patra
Improve RISC-V Perf support using SBI PMU and sscofpmf extension archive mirror help / color / mirror / Atom feed * Improve RISC-V Perf support using SBI PMU and sscofpmf extension 19:53 Atish Patra